CSE Professor Katkoori and his MS student, Raaga Sai Somesula, have received The Outstanding Thesis and Dissertation (OTD) Award for Raaga鈥檚 Master鈥檚 thesis work on a resource-efficient custom hardware for machine learning models. The award recognizes those USF graduates who have demonstrated exceptional performance and whose thesis or dissertation has resulted in a significant impact to the discipline at the national level.
鈥淢y main aim was to help the health sector get cheaper devices. It was not a piece of cake,鈥 Raaga laughed. Since their aim was a hardware implementation for high-speed and low power, they opted to use pre-trained models and focused on the inference phase, rather than training in the field.
Initially, they compared Multilayer Perceptrons (MLP) with Decision Tree models. MLPs are powerful neural networks, however they require more resources, whereas Decision Trees utilize a hierarchical structure to predict outcomes. Although, after comparing the accuracy of MLP and decision trees on several healthcare and agriculture datasets, they found that decision trees performed comparably to MLPs.
鈥淭he innovation of this Master鈥檚 work was that we implemented Decision Tree Models in an H-tree architecture using VLSI (See Figs. 1 and 2).鈥 said Raaga. Very-large-scale integration (VLSI) is when a chip is created by combining millions or billions of transistors.
鈥淚n chip design, there鈥檚 a known way to implement an H-tree for clock networks on a chip,鈥 said Professor Katkoori. 鈥淲e used this to create a custom architecture that implements decision tree models as a modular and scalable architecture to program a decision tree model.鈥
The inspiration for the project came from Professor Katkoori鈥檚 experience with IoT devices, as power and memory is always a big problem. Likewise, low battery life can also be a problem in smart agriculture solutions. 鈥淚n comparison to other MLP models, ours uses 98% less power (See Fig. 3),鈥 said Professor Katkoori.
鈥淲e have generally shown that you can use decision trees for datasets. This gives a similar accuracy, but needs less resources compared to the MLP,鈥 said Raaga. Generally speaking, anything that can be done by software is actually being done by hardware, so by creating a hardware implementation, the power, memory, and latency can be drastically reduced.
To qualify for the award, a student needs to be nominated by their major professor and seek outside support from expert testimony from outside the university. Raaga received hers from Professor Saraju Mohanty from UNT Texas.
鈥淭his was an exciting project we worked on with Raaga, who is a hardworking student. We鈥檙e pleased that we were able to prove this in simulations, and we鈥檙e looking forward to patenting and commercializing it,鈥 said Professor Katkoori.
In addition to this award for her thesis , Raaga has two peer reviewed publications in international conferences: GLSVLSI 2023, and IFIP IoT Conference 2024, and has a patent under consideration.
鈥淎ll the credit goes to my advisor, Professor Katkoori, because he was a constant support for me from the beginning of my thesis. He was there whenever I needed help. And also my lab mates who helped in between, I was actually losing a lot of hope in between my experiments. All of those struggles paid off.鈥
Raaga was recently hired by the largest semiconductor manufacturer in the world, Taiwan Semiconductor Manufacturing Company (TSMC).